# Hardware_Design_Process

**Repository Path**: ray-yue/Hardware_PCBA_Design_Precess

## Basic Information

- **Project Name**: Hardware_Design_Process
- **Description**: Hardware PCBA Design Process
- **Primary Language**: Unknown
- **License**: GPL-3.0
- **Default Branch**: master
- **Homepage**: None
- **GVP Project**: No

## Statistics

- **Stars**: 0
- **Forks**: 1
- **Created**: 2022-08-18
- **Last Updated**: 2022-08-18

## Categories & Tags

**Categories**: Uncategorized

**Tags**: None

## README

# Hardware Design Process

#### 介绍
TEST PCBA Dsign Flow 

#### 使用工具
Cadence 16.6


>Contact: Yue Leilei  
>Voice:   Phone  
>email:   email.com  
>Company Name  
>Address  
>Xi'an, CHINA 



            Hardware Process

![V model](https://images.gitee.com/uploads/images/2019/0930/140428_63fe0ae4_39835.jpeg "Snipaste_2019-09-30_14-03-08.jpg")

MyProj<br/>
     |<br/>
     |-XXXXX.BRD       PCB Database (Cadence 16.6)<br/> 
     |-XXXXX.DSN       Schematic Database (OrCAD 16.6)<br/>
     |-XXXXXSCH.PDF    Schematic pages in Adobe Acrobat Format<br/>
     | <br/>
	 |-1_21_HR<br/>
	 |         	|-XXXXXX_Block_Diagram.VSD		Block Diagram<br/>
	 |-1_61_HT<br/>
	 |        	|-XXXXXX_Test Report.DOC<br/>