From c28fe093da13422e8a392c7413769d657e2f7ef9 Mon Sep 17 00:00:00 2001 From: Liao Xuan Date: Thu, 29 Jan 2026 17:34:33 +0800 Subject: [PATCH 1/2] EDAC/amd64: Convert Hygon family 18h model checks to switch-case commit 41369fd13d4c2193c8ecb92a8072b705e38aabac anolis ANBZ: #30343 Replaces a chain of if-else statements with a switch statement for handling Hygon family 18h models processors. Hygon-SIG: commit none hygon anolis: EDAC/amd64: Convert Hygon family 18h model checks to switch-case Hygon-SIG: commit 41369fd13d4c anolis anolis: EDAC/amd64: Convert Hygon family 18h model checks to switch-case Backport from anolis to support Hygon family 18h model 18h Signed-off-by: Liao Xuan Cc: hygon-arch@list.openanolis.cn Reviewed-by: Xiaochen Shen Reviewed-by: Ruidong Tian Reviewed-by: Guixin Liu Link: https://gitee.com/anolis/cloud-kernel/pulls/6454 [ YuntongJin : amend commit log ] Signed-off-by: YuntongJin --- drivers/edac/amd64_edac.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 18ea110a1d74..28ebbade564c 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -4481,28 +4481,31 @@ static int per_family_init(struct amd64_pvt *pvt) break; case 0x18: - if (pvt->model == 0x4) { + switch (pvt->model) { + case 0x4: pvt->ctl_name = "F18h_M04h"; pvt->max_mcs = 3; break; - } else if (pvt->model == 0x5) { + case 0x5: pvt->ctl_name = "F18h_M05h"; pvt->max_mcs = 1; break; - } else if (pvt->model == 0x6) { + case 0x6: pvt->ctl_name = "F18h_M06h"; break; - } else if (pvt->model == 0x7) { + case 0x7: pvt->ctl_name = "F18h_M07h"; break; - } else if (pvt->model == 0x8) { + case 0x8: pvt->ctl_name = "F18h_M08h"; break; - } else if (pvt->model == 0x10) { + case 0x10: pvt->ctl_name = "F18h_M10h"; break; + default: + pvt->ctl_name = "F18h"; + break; } - pvt->ctl_name = "F18h"; break; case 0x19: -- Gitee From b2835d538b5f665be5b393689e78c9abf9befe38 Mon Sep 17 00:00:00 2001 From: Liao Xuan Date: Mon, 16 Mar 2026 11:42:42 +0800 Subject: [PATCH 2/2] EDAC/amd64: Add support for Hygon family 18h model 18h commit eb162a81e5007122e42bab182a9807dbe34fc029 anolis. ANBZ: #30343 Add Hygon family 18h model 18h processor support for amd64_edac. For Hygon family 18h model 0x18h-0x1fh processors, the UMC base are identical, so modify them uniformly. Meanwhile, code for Hygon UMC base calculations has been moved to a dedicated function. Hygon-SIG: commit none hygon anolis: EDAC/amd64: Add support for Hygon family 18h model 18h Hygon-SIG: commit eb162a81e500 anolis anolis: EDAC/amd64: Add support for Hygon family 18h model 18h Backport from anolis to support Hygon family 18h model 18h Signed-off-by: Liao Xuan Cc: hygon-arch@list.openanolis.cn Reviewed-by: Xiaochen Shen Reviewed-by: Ruidong Tian Reviewed-by: Guixin Liu Link: https://gitee.com/anolis/cloud-kernel/pulls/6454 [ YuntongJin : amend commit log, fix conflict ] Signed-off-by: YuntongJin --- drivers/edac/amd64_edac.c | 31 +++++++++++++++++++++++++++---- 1 file changed, 27 insertions(+), 4 deletions(-) diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 28ebbade564c..a69d9ebf9472 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -107,6 +107,29 @@ static u32 get_umc_base_f18h_m4h(u16 node, u8 channel) return get_umc_base(channel) + (0x80000000 + (0x10000000 * df_id)); } +static u32 get_umc_base_f18h_m18h(u8 channel) +{ + return 0x70000000 + (channel << 20); +} + +static u32 hygon_get_umc_base(struct amd64_pvt *pvt, u8 channel) +{ + u32 umc_base; + + if (hygon_f18h_m4h()) + umc_base = get_umc_base_f18h_m4h(pvt->mc_node_id, channel); + /* + * For Hygon family 18h model 0x18h-0x1fh processors, the UMC base + * are identical. + */ + else if (hygon_f18h_m10h() && boot_cpu_data.x86_model >= 0x18) + umc_base = get_umc_base_f18h_m18h(channel); + else + umc_base = get_umc_base(channel); + + return umc_base; +} + /* * Select DCT to which PCI cfg accesses are routed */ @@ -2053,8 +2076,8 @@ static void umc_read_base_mask(struct amd64_pvt *pvt) if (!hygon_umc_channel_enabled(pvt, umc)) continue; - if (hygon_f18h_m4h()) - umc_base = get_umc_base_f18h_m4h(pvt->mc_node_id, umc); + if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) + umc_base = hygon_get_umc_base(pvt, umc); else umc_base = get_umc_base(umc); @@ -3543,8 +3566,8 @@ static void umc_read_mc_regs(struct amd64_pvt *pvt) if (!hygon_umc_channel_enabled(pvt, i)) continue; - if (hygon_f18h_m4h()) - umc_base = get_umc_base_f18h_m4h(pvt->mc_node_id, i); + if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) + umc_base = hygon_get_umc_base(pvt, i); else umc_base = get_umc_base(i); -- Gitee